SoC security evaluation: Reflections on methodology and tooling

Corteggiani, Nassim; Camurati, Giovanni; Muench, Marius; Poeplau, Sebastian; Francillon, Aurélien
Invited paper in IEEE Design & Test, 3 August 2020

The growing complexity of Systems-on-Chip challenges our ability to ensure their correct operation, on which we rely for more and more sensitive activities. Many security
vulnerabilities appear in subtle and unexpected ways in the interaction among blocks and across layers, where current verification tools fail at catching them or do not scale. For this reason, security evaluation still heavily relies on manual review. Inspired by the Hack@DAC19 contest, we present our reflections on this topic from a software and system security perspective. We outline an approach that extends the dynamic analysis of
firmware to the hardware.

Invited Journal
Digital Security
Eurecom Ref:
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