Renaud PACALET
Mes publications EURECOM
Journal
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Novembre 2012
Journal
Dynamic power management for the iterative decoding of turbo codes
IEEE Transactions on Very Large Scale Integration Systems, Volume 20, N°11, November 2012
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Août 2011
Journal
High throughput and low power enhancements for LDPC decoders
"International Journal On Advances in Telecommunications", August 2011, vol 4, N°1 & 2, ISSN: 1942-2601
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Décembre 2010
Journal
Hardware optimized sample rate conversion for software defined radio
FREQUENZ, Journal of RF-Engineering and Telecommunications, November-December 2010, Vol 64, N°11-12
Conférence
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Octobre 2012
Conférence
Flexible Front-End Processing for Software Defined Radio Applications using Application Specific Instruction-Set Processors
DASIP 2012, Conference on Design and Architectures for Signal and Image Processing, 23-25 October 2012, Karlsruhe, Germany
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Octobre 2011
Conférence
Application-specific instruction-set processor for digital front-end processing in wireless communications
ACROPOLIS 2011, 1st Annual Workshop on Advanced coexistence technologies for radio resource usage optimisation, October 4-5, 2011, Barcelona, Spain
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Septembre 2010
Conférence
Hybrid iteration control on LDPC decoders
ICWMC 2010, 6th IEEE International Conference on Wireless and Mobile Communications, September 20-25, 2010, Valencia, Spain
Best paper award
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Septembre 2010
Conférence
On-the-fly syndrome check for LDPC decoders
ICWMC 2010, 6th IEEE International Conference on Wireless and Mobile Communications, September 20-25, 2010, Valencia, Spain
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Juillet 2010
Conférence
Dynamic power management on LDPC decoders
ISVLSI 2010, IEEE Computer Society Annual Symposium on VLSI, July 5-7, 2010, Lixouri Kefalonia, Greece
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Juin 2010
Conférence
Architectures for cognitive radio testbeds and demonstrators - An overview
CROWNCOM 2010, 5th International Conference on Cognitive Radio Oriented Wireless Networks and Communications, 9-11 Juin 2010, Cannes, France
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Mars 2010
Conférence
Hardware optimized sample rate conversion for software defined radio
WSR 2010, 6th Karlsruhe Workshop on Software Radios, March 3-4, 2010, Karlsruhe, Germany
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Octobre 2009
Conférence
Energy efficiency of SISO algorithms for turbo-decoding message-passing LDPC decoders
VLSI-SOC 2009, 17th IFIP/IEEE International Conference On Very Large Scale Integration, October 13th, 2009, Florianopolis, Brazil
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Août 2009
Conférence
Open platform for prototyping of advanced software defined radio and cognitive radio techniques
DSD 2009, 12th Euromicro Conference on Digital System Design : Architectures, Methods and Tools, August 27-29, 2009, Patras, Greece
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Juillet 2009
Conférence
Optimum LDPC decoder : a memory architecture problem
DAC 2009, 46th Design Automation Conference, July 26-31, 2009, San Francisco, USA
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Septembre 2008
Conférence
Flexible baseband architectures for future wireless systems
DSD 2008, 11th Euromicro Conference on Digital System Design Architectures, Methods and Tools, September 3-5, 2008, Parma, Italy
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Décembre 2007
Conférence
Reconfigurable DSP architectures for SDR applications
ICECS 2007, 14th IEEE International Conference on Electronics, Circuits and Systems, December 11-14, 2007, Marrakech, Morocco
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Novembre 2007
Conférence
Cognitive radio research and implementation challenges
Asilomar 2007, Conference on Signals, Systems, and Computers, November 4-7, 2007, Pacific Grove, USA
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Février 2007
Conférence
Cognitive radio platform: from achievable performance to architecture design
ETSI Software Defined Radio (SDR)/Cognitive Radio (CR) Workshop, February 9th, 2007, Sophia-Antipolis, France
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Septembre 2006
Conférence
Using GPU for fast block-matching
EUSIPCO 2006, 14th European Signal Processing Conference, September 4-8, 2006, Florence, Italy
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Septembre 2005
Conférence
Reconfigurable Viterbi decoder for mobile platform
MWCN 2005, 7th IFIP International Conference on Mobile and Wireless Communications Networks, September, 19-21 , 2005 - Marrakech, Marocco



