Energy efficiency of SISO algorithms for turbo-decoding message-passing LDPC decoders

Amador, Erick; Rezard, Vincent; Pacalet, Renaud
VLSI-SOC 2009, 17th IFIP/IEEE International Conference On Very Large Scale Integration, October 13th, 2009, Florianopolis, Brazil

The decoding of LDPC codes using the turbodecoding message-passing strategy is considered. This strategy can be used with different SISO message computation kernels. We analyze the suitability for VLSI implementation of various message computation algorithms in terms of implementation area, energy consumption and error-correcting performance. As one of the computation kernels, we introduce the recent SelfCorrected Min-Sum algorithm and show the advantages it brings from an energy efficiency perspective. We present comparisons among the studied kernels implemented in a 65nm CMOS process and use a test case from the codes defined in IEEE 802.11n to show differences in energy efficiency. 


Type:
Conférence
City:
Florianopolis
Date:
2009-10-13
Department:
Systèmes de Communication
Eurecom Ref:
2922
Copyright:
© IFIP. Personal use of this material is permitted. The definitive version of this paper was published in VLSI-SOC 2009, 17th IFIP/IEEE International Conference On Very Large Scale Integration, October 13th, 2009, Florianopolis, Brazil and is available at :

PERMALINK : https://www.eurecom.fr/publication/2922