The past few decades have seen the rapidest growth of technology and diversification of services in the realm of wireless communications.
This growth is because of the enhanced use of wireless devices with new functionalities in daily life, while diversity is indebted to the fact that new and advanced applications keep on pouring in. Today, there exists multiple standards for cellular networks (GSM, EDGE, WCDMA etc.), and wireless local area networks (IEEE 802.11a, b, g). Now each of these standards has different carrier frequencies, channel bandwidths and modulation schemes. The phenomenal growth of these modern standards and applications necessitate a flexible hardware platform that is capable to support these diverse standards in the entire wireless communication frequency range. Efficient and flexible baseband processors are imperative for endorsing true multi-standard radio platforms.
We present a generic baseband prototype architecture for Software Defined Radio (SDR) applications that anticipates not only to fulfill current UMTS processing requirements but is also proficient enough to handle 3GPP Long Term Evolution (LTE) processing requirements. The baseband architecture is adept in implementing 2G, 3G, 4G, broadcast communication and wireless LAN standards. The partitioning between HW and SW pursues a general cost-and-complexity versus speed trade-off. The control is in software part of design, which passes the relevant parameters to hardware for specific functionalities. The hardware is designed in such a manner that it would substantiate the most computation intensive task efficiently i.e. meeting the throughput and latency requirements. The hardware is also flexible enough to employ the same baseband processing resources for multiple standards. The presented configurable architecture takes advantage of the commonalities that exist among the different schemes to be implemented but in an efficient manner. The commonalities and disjoints are translated into hardware architecture to come up with a system that performs all the required operations by all the applications. The end product will enable user to perform desired scheme / standard by providing the parameters without going into any details of the architecture. The proposed scheme is far more efficient than having dedicated blocks for each application.
The multi-standard designs should have high performance to comply with the throughput and timing constraints of all the standards with the same HW/SW design. To explore the performance criteria in the baseband design, we present specification, design and implementation of hardware blocks using two approaches, Application Specific Integrated Circuit (ASIC) and Application Specific Instruction Processors (ASIP) designs. The ASIP design provides more flexibility and programmability at the cost of some loss in the performance. We also consider the other existing hardware technologies, take into account their specific advantages and drawbacks, and compare those on the basis of computation type categorization in the baseband design to come up with some guidelines for multi-standard baseband design.
