Hardware optimized sample rate conversion for software defined radio
WSR 2010, 6th Karlsruhe Workshop on Software Radios, March 3-4, 2010, Karlsruhe, Germany
The evolution towards applications with increasing functionalities leads to the need of high flexible systems that support a high number of different standards while decreasing the required space consumption. Therefore a high configurable platform being able to handle different standards is needed. One main issue is the tradeoff between performance and space consumption. We present a generic, flexible and hardware optimized SRC architecture in the context of SDR, providing one architecture to process up to 8 different complex channels. The solution is based on bandlimited interpolation and allows processing by supporting a 1Hz resolution between the sampling rates.
| Mots Clés: | SDR, SRC, Hardware Architecture, Open platforms for multistandard support, Baseband, Processing, HWaccelerators |
| Type: | Conférence |
| Langue: | English |
| Ville: | Karlsruhe |
| Pays: | ALLEMAGNE |
| Date: | Mars 2010 |
| Département: | Communications Mobiles |
| Eurecom ref: | 3058 |
| Copyright: | KIT Scientific Publishing |
| Bibtex: | @inproceedings{EURECOM+3058, year = {2010}, title = {{H}ardware optimized sample rate conversion for software defined radio}, author = {{S}chmidt-{K}norreck, {C}arina and {K}nopp, {R}aymond and {P}acalet, {R}enaud }, booktitle = {{WSR} 2010, 6th {K}arlsruhe {W}orkshop on {S}oftware {R}adios, {M}arch 3-4, 2010, {K}arlsruhe, {G}ermany}, address = {{K}arlsruhe, {ALLEMAGNE}}, month = {03}, url = {http://www.eurecom.fr/publication/3058} } |
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Permalink: http://www.eurecom.fr/publication/3058
