Graduate School and Research Center in Digital Sciences

Digital systems, hardware - software integration

T Technical Teaching


  • This course provides an overview of software and hardware design for smart objects.
  • It is mandatory in the "Smart Objects" track.
  • Software and hardware aspects, system integration, design and validation tools are studied.
  • The main goal is to reach a sufficient level of understanding to design alone a prototype system embedding one or several hardware operators for the processing and a micro-processor, plus its peripherals, for the control. A hands-on approach is taken, with the aid of state-of-the-art laboratory equipment.
  • During the final project the students design an actual prototype on a FPGA-based prototyping board, design the embedded software, connect the board to a host PC and test their application. Examples of past projects: hardware accelerator for a cryptographic enciphering algorithm, or for an image processing one, ...
  • The course's website


  • Application specific integrated circuits, Smith, Michael John Sebastian, Addison-Wesley - 06/1997 - 1040 p. 
  • VHDL for logic synthesis, Rushton, Andrew, John Wiley & Sons - 1998 - 375 p.
  • The designer's guide to VHDL, Ashenden, Peter J, Morgan Kaufmann - 06/2008 - 936 p.
  • Embedded systems handbook, Zurawski, Richard, CRC Press - 16/08/2005 - 1160 p.


Being able to work under a GNU/linux environment

Knowledge of a text editor (vim, emacs, nano, gedit, Notepad...)


  • VHDL / Verilog: Hardware description languages, design methods and logic synthesis of hardware accelerators, simulation, formal verification by model checking, design of simple processing devices.
  • Integrated circuits : design of hardware accelerators, estimation of silicon area and maximum reachable clock frequency.
  • FPGA : design and rapid prototyping of micro-processor based systems, design of embedded software applications, performance evaluation, design of hardware co-processors to speedup the software processing, system integration, performance evaluation
Nb hours: 42.00
Nb hours per week: 3.00
Control form: examen écrit et cahier de TP